1. Field of the Invention
The present invention relates to a semiconductor device using an SOI (Silicon On Insulator) substrate. More particularly, it relates to a high speed bipolar semiconductor device, and a drive circuit made up of the semiconductor devices.
2. Description of the Related Art
A bipolar transistor will be described as a prior-art example of a semiconductor device of an SOI structure. An example of this kind of bipolar transistor is disclosed in “A 6-μm2 bipolar transistor using 0.25-μm process technology for high-speed applications” (Bipolar/BiCMOS Circuits and Technology Meeting 1998 proceedings).
FIG. 2 shows a cross sectional view of the bipolar transistor described in the prior-art example.
In FIG. 2, a reference numeral 1 denotes a silicon substrate, 2 a buried silicon dioxide, 3 a silicon layer, 4 an n+ buried layer, 5 an n− silicon epitaxial layer, 6 a field oxide, 7 an n+ collector contact layer, 11 an isolation oxide, 14 a p+ extrinsic base polysilicon electrode, 15, 18, and 22 silicon dioxides, 16 an intrinsic base layer, 17 a graft base, 19 an n+ polysilicon sidewall, 20 an n+ polysilicon emitter, 21 a single crystal silicon emitter, and 23, 24, 25 metal electrodes.
Further, as a second prior-art example, a part of the configuration disclosed in JP-A No. 86298/1995 is shown in FIG. 3. Some reference numerals are used in common with FIG. 2, and as other reference numerals, 12 denotes a polysilicon, and 30 a silicon dioxide.
In general, a semiconductor device generates heat during operation. Particularly, a bipolar transistor generates a large amount of heat, and radiates the heat to a silicon substrate. In recent years, an SOI (Silicon On Insulator) substrate with an insulating film buried therein has been used in place of a silicon bulk substrate aiming at reducing the substrate capacitance and merging complementary MOS therewith. The prior-art example as shown in FIG. 2 is a preferable example thereof. The thermal conductivity of the buried silicon dioxide 2 is about 1/100 as compared with silicon. Therefore, the generated heat is less likely to be radiated to the substrate as compared with the silicon bulk substrate, resulting in an increase in temperature in the transistor. Consequently, the change in the electrical characteristics of the transistor becomes remarkable.
Particularly, a hetero bipolar transistor using silicon-germanium as a base is reduced in current gain with an increase in temperature. This indicates the phenomenon that the electrical characteristics of the transistor differ according to the difference in density of the transistor arrangement, and the conditions of use. For this reason, a problem occurs that it is impossible to attain the performances as designed in a designed circuit. Further, the transistor is required to be used at high current for high-speed operation. Accordingly, the high-speed operation of the transistor is restricted in order to prevent the heat generation due to a current. Such a phenomenon holds true for not only the hetero bipolar transistor, but also semiconductor devices of an SOI structure such as a bipolar transistor using an SOI, a high-power MOS field effect transistor of an SOI structure, and a resistor used at a high current density.
As a means for solving the problem of heat radiation, for the bipolar transistor disclosed in the second prior-art example shown in FIG. 3, an isolation oxide 11 and a polysilicon 12 are buried in an isolation groove penetrating from a silicon substrate 1 to a buried silicon dioxide 2 and a silicon layer 3. As a result, the generated heat flows through the isolation oxide 11 to the polysilicon 12, and is radiated to the silicon substrate 1. In this case, the isolation oxide 11 is required to be reduced in film thickness in order to enhance the effect of heat radiation. However, if the isolation oxide 11 is reduced in thickness, the capacitance arising at the isolation groove portion of the substrate capacitance increases. Incidentally, the structure of the second prior-art example is a part of the one described in the JP-A No. 86298/1995. With this structure, heat radiation is carried out not through the silicon substrate, but at a heat radiation electrode through the groove in which a polysilicon is buried.